CoAsia Semi 開始量產出貨採用 Samsung Electronics 4nm 製程的網絡交換器晶片晶圓
CoAsia Semi Begins Shipments of Chips Made on Samsung’s 4nm Process
CoAsia Semi 已開始量產出貨採用 Samsung Electronics 4nm 晶圓代工製程製造的網絡交換器晶片晶圓。每枚晶片面積超過 800 square millimeters,是 CoAsia Semi 歷來項目中最大的裸晶;合約總值為 $175 million。晶圓出貨於 10 月中開始,後續供應將按客戶生產安排分階段延續至 2029 年。

CoAsia Semi has begun mass-production shipments of semiconductor device wafers manufactured using Samsung Electronics’ 4nm foundry process. (Photo: CoAsia Semi)
Semiconductor design house (DSP) CoAsia Semi announced on Nov. 2 that it has begun mass-production shipments of semiconductor device wafers manufactured using Samsung Electronics’ 4-nanometer (nm) foundry process.
The devices fabricated on the wafers are network switch chips designed to support high-speed data transmission and processing in high-performance computing (HPC) environments. Each chip measures more than 800 square millimeters, making it the largest die CoAsia Semi has handled in any of its projects.
Larger individual chip sizes make yield management more difficult because they increase the likelihood of defects. They also present greater manufacturing challenges due to the numerous factors that must be considered during design, including power consumption and heat generation.
Mass-production shipments of the device wafers began in mid-October. Supplies will be delivered in stages through 2029 in line with the customer’s production schedule, with revenue recognized accordingly. The total contract value is $175 million.
CoAsia Semi said it had secured the 4nm wafer production capacity needed for mass production in advance amid intensifying competition for manufacturing capacity. The company is also continuing to collaborate with the customer on a follow-up project.
CoAsia Semi has previously signed mass-production supply agreements for artificial intelligence (AI) chiplets with Rebellions and Tenstorrent. Chiplet technology combines smaller semiconductor dies with different functions into a single package.
In August 2026, CoAsia Semi became the first South Korean design house to begin mass production of an 8nm system-on-chip (SoC) using three-dimensional integrated circuit (3D IC) packaging. The technology involves vertically stacking semiconductor chips. The company has expanded its turnkey services, covering the entire process from design to finished-product manufacturing, into the ultra-large, high-performance semiconductor segment.
來源:The Elec · thelec.net