Salience Labs 籌集 $125 million B 輪融資，推進 AI 數據中心光電路交換技術

Adding GPUs does not automatically make an AI system faster. When thousands of processors have to exchange data, the network can determine how much useful work those expensive chips actually complete. Salience Labs is targeting that constraint with switches that keep data in the optical domain as it moves between connections.

The Oxford-based company has raised an oversubscribed $125 million Series B led by Bullhound Capital. Participants include AMD Ventures, Intel Capital, SBI Group, Hudson River Trading and the British Business Bank, alongside existing shareholders. Bullhound principal Callum Stewart is joining the board.

The capital will support deployment of its optical circuit switching technology, higher-volume manufacturing and expansion of its Silicon Valley presence. The announcement follows a demonstration of a 64-port silicon photonic switch at ECOC 2026, with future 128- and 256-port products on the roadmap.

Why AI Infrastructure Needs More Than Faster Processors

Large AI workloads distribute computation across many accelerators. Those accelerators need to exchange information, and delays in communication can leave compute resources waiting. Increasing processor performance without addressing data movement can therefore produce diminishing system-level returns.

Optical links already carry data through many datacenter networks. But an optical link and an optical switch solve different problems. A link transports the signal; a switch determines the connection through which it travels. In conventional electrical switching, optical signals must be converted into electrical form at the switching stage and converted back for onward optical transmission.

Optical circuit switching establishes a path for the light signal itself. The objective is to reduce conversion overhead and provide a low-latency connection between endpoints. This is a networking technology: it does not replace GPUs or perform the model’s computations.

The distinction helps explain the growing interest in networking as a constraint on AI performance. Useful gains depend on how compute, memory and interconnects operate together, rather than on a single component’s specification.

What Salience’s Silicon Photonic Approach Adds

Salience describes its design as a fully integrated, all-optical switch architecture intended to connect GPUs across multiple racks. Its technology builds on more than a decade of silicon photonics research associated with the University of Oxford and the University of Münster.

Silicon photonics places optical functions on semiconductor chips. Salience’s commercial argument is that integrating switching and amplification can combine optical performance with a path to repeatable, high-volume manufacturing. Turning that design into production hardware is a central purpose of the Series B.

The company’s product documentation provides a concrete reference point in the OC-32M module: a non-blocking 32-input, 32-output optical switch that integrates a photonic chip for switching and amplification, driving electronics, firmware and fiber connectors. It also describes a rack-mounted evaluation platform for customer development.

For that module, Salience lists 10-nanosecond input-to-output latency, less than 300 microseconds for reconfiguration, less than 2 dB insertion loss and power below one watt per port. These are company specifications for the documented product, not independently verified measurements of the newly demonstrated 64-port system.

Switching Latency and Reconfiguration Are Different

The two timing figures describe different events. Latency concerns how long a signal takes to pass through an established connection. Reconfiguration concerns how long it takes to change which endpoints are connected.

A very fast optical path does not mean the network can rearrange itself on the same timescale. Applications benefit when connection patterns and scheduling make effective use of the circuits, accounting for the time needed to change them.

Insertion loss matters for another reason: optical signals lose power as they pass through components and connections. Switches need to fit within the network’s optical power budget. Salience points to its integrated amplification as part of its approach to making optical switching practical at scale.

Its technology page also emphasizes lower power consumption and solid-state reliability. Those advantages need to be assessed at the appropriate level. A per-port power figure is not the same as the energy consumption of a complete AI cluster, and a low switch latency does not by itself establish faster training or inference.

From 64 Ports to a Larger Network

The ECOC demonstration marks a step beyond the 32-port product described on Salience’s website. The company characterizes the 64-port demonstration as an industry first for silicon photonics optical circuit switching.

The funding is intended to support development toward 128 and 256 ports. Higher port counts could provide more connectivity options within a single switch, but those larger products remain future solutions in the announcement. Their demonstration, qualification and volume availability are separate milestones.

Salience is targeting both scale-up and scale-out environments. Scale-up networks connect accelerators into tightly coordinated compute systems, while scale-out networks connect systems across larger clusters. Both need high-performance communication, although their topology and workload requirements differ.

The company’s stated ambition to connect thousands of GPUs describes the intended network scope; it should not be confused with the port count of an individual switch. Building that network requires decisions about topology, control, compatibility and how switches are combined.

Manufacturing and Integration Become the Next Test

CEO and co-founder Vaysh Kewada leads Salience alongside CTO and co-founder Johannes Feldmann. Founded in 2021, the company is now directing new capital toward manufacturing scale and a broader U.S. footprint, including a second West Coast location.

The release identifies continued engagement with Keysight Technologies and Tower Semiconductor as part of its plans to support deployment and high-volume operations. That points to the work beyond the photonic chip: testing, packaging, control electronics, system integration and dependable production all influence whether a new switch becomes usable infrastructure.

Backing from AMD Ventures and Intel Capital adds interest from investors closely associated with the compute ecosystem. It does not, on its own, establish a product integration, customer order or deployment commitment from either chipmaker.

The Series B gives Salience resources to pursue the transition from optical switching demonstrations to larger-scale production. Its progress will be measured by qualified hardware, manufacturing consistency and workload-level results showing where optical circuits improve the economics and performance of AI infrastructure.