Weebit Nano 推出 Matrix ReRAM 記憶體內 AI 運算研究計劃

Weebit Nano has launched the Weebit Matrix In-Memory Compute Research Program, giving academic and industry researchers access to ReRAM hardware for testing a different way to run AI calculations: perform them where the data is stored.

The program provides research kits built around a 32 × 32 crossbar array, with support for operations including vector-matrix multiplication, convolution, and spiking neural networks. It targets an important hardware question for edge AI: how much energy and time can be saved by reducing repeated transfers between memory and a separate processor?

This is a research-platform launch, rather than a finished commercial AI accelerator. Weebit says technical challenges remain before an in-memory computing solution reaches the commercial market. The immediate objective is to let researchers move from models and simulations to experiments on actual ReRAM hardware.

Why Calculate Inside Memory?

Neural-network inference repeatedly combines inputs with stored model weights. In a conventional architecture, moving those values through the memory hierarchy can consume bandwidth and energy. In-memory computing, or IMC, seeks to perform some of that work within the memory array itself.

Resistive random-access memory, or ReRAM, stores information using programmable electrical resistance. Weebit’s oxide-based cells contain a switching layer between electrodes; applied voltages change the conductive path and therefore the cell’s resistance. The stored state persists without continuous power, making ReRAM non-volatile.

In analog computing research, those electrical properties can do more than store bits. An array can encode weights in its memory cells and use the resulting electrical responses to participate in calculations. That connects the physical behavior of the memory to the multiply-and-accumulate operations used throughout neural networks.

The goal is especially relevant to devices with tight power and thermal budgets, including sensors, industrial equipment, and other edge systems. It does not imply that every part of an AI model runs inside the array or that data movement disappears from the complete system.

What the Matrix Research Kits Include

Weebit is initially offering two packages:

• Matrix IMC Evaluation Package: a direct-access evaluation board for researchers who want closer access to the hardware.
• Matrix IMC Quick-Start Package: a complete IMC board, an FPGA subsystem, and sample code.

Both include packaged chip samples, documentation, and an IMC board with a socket. The 32 × 32 crossbar provides a controlled platform for investigating programming methods, AI algorithms, and neuromorphic architectures, including spiking neural networks.

The FPGA subsystem in the quick-start option gives researchers programmable digital hardware alongside the memory array. That is useful for exploring hybrid systems, where memory-based operations work with conventional processing rather than attempting to replace an entire computing pipeline.

Participants will share ReRAM-related results and feedback with Weebit. The company says that collaboration is intended to improve the technology and inform the wider research effort. The announcement does not disclose kit pricing, accepted-project numbers, or a commercial accelerator delivery date.

Putting the 80× Power Claim in Context

A linked research summary provides important detail behind Weebit’s performance claims. An unnamed U.S. company working on radiation-tolerant AI hardware evaluated an IMC architecture for an image-classification workload using a custom convolutional neural network.

The comparison used an NVIDIA GeForce RTX 4090 GPU and a Xilinx ZCU104 FPGA platform. The IMC system-level results were projected through application modeling based on measurements from a Weebit ReRAM array.

For that workload, the analysis projected approximately 80 times lower power consumption than the GPU implementation and 13 times lower power than the FPGA implementation. The launch release separately describes an almost 100-fold latency reduction. These are workload-specific projections, not independently validated measurements of a complete commercial Matrix accelerator outperforming GPUs across AI tasks.

That distinction is central to the research program. A useful array-level result needs to translate into a complete system that preserves model accuracy while accounting for control, data conversion, communications, and other supporting operations. Those surrounding functions also consume energy and add latency.

Hardware Experiments Can Reveal What Simulations Miss

Weebit CEO Coby Hanoch points to earlier collaboration with CEA-Leti, including a ReRAM-based spiking neural-network demonstration in 2019. Matrix extends that research direction by making a defined hardware platform available to additional qualified researchers.

Neuromorphic researcher Kevin D. Johnson, whose work includes heterogeneous and neuromorphic computing, said he wants to use the platform to validate models against actual hardware and assess system-level accuracy, latency, and power consumption. His interests include combining ReRAM with other processing technologies.

That approach reflects the practical opportunity: identify which parts of a workload benefit from memory-based computation, then combine them with other hardware where appropriate. The research question is broader than whether an individual operation is efficient; it includes whether the resulting system delivers useful and repeatable application performance.

Weebit also highlights radiation tolerance as a reason to investigate ReRAM for harsh environments. Suitability for a particular aerospace, defense, or medical deployment would still depend on the requirements and validation of the complete design.

Demonstrations and Research Access

Weebit plans to demonstrate Matrix IMC at electronica 2026, taking place November 10–13 in Munich. The company lists Hall C2, stand 637, with demonstration and meeting details on its event page.

The packages are available to qualified researchers, and applications will be evaluated for alignment with the program’s research focus. Weebit provides a research-project application form for prospective participants.

Matrix’s immediate contribution is access to hardware that can test the assumptions behind in-memory AI. For a field built around reducing the cost of moving data, the valuable evidence will be how measured accuracy, energy use, and latency hold up together when researchers run real workloads.