Micron 研發面向人形機械人的 EIM 記憶體

Lee Cheol, vice president at Micron, speaks at the “Semiconductors Powering Humanoids” conference during SEDEX 2026 at COEX in Seoul on Oct. 16. (Photo: THE ELEC)

Micron is preparing edge inference memory (EIM), a memory semiconductor designed for physical artificial intelligence (AI) applications.

Lee Cheol, vice president at Micron, said at the “Semiconductors Powering Humanoids” conference, held as part of Semiconductor Exhibition (SEDEX) 2026 at COEX in Seoul on Oct. 16, that the physical AI market, including autonomous driving, humanoid robots, augmented reality (AR) and virtual reality (VR), is growing rapidly. “We are discussing the development of products suited to these emerging markets with major customers,” he said.

EIM is designed to process data required for AI inference at high speeds. It stacks low-power DRAM (LPDDR) on top of a logic die. The technology differs from processing-in-memory (PIM), which performs computations within memory. Both technologies improve data processing efficiency by operating alongside AI chips. PIM incorporates computing units within memory, while EIM’s computing architecture has not been disclosed.

EIM is positioned between AI chips and memory to reduce data processing latency and increase bandwidth. Micron has not disclosed specific performance targets. The company is developing a method of applying EIM to LPDDR6, with industry observers expecting mass production in the second half of 2028.

Humanoid robots perceive their surroundings and independently determine their actions. Unlike conventional industrial robots that repeat predefined movements, humanoids operate autonomously. They must perceive and process visual and auditory information, weight and texture.

Humanoid robots use low-power DRAM such as LPDDR rather than high-bandwidth memory (HBM). Unlike data centers, where HBM is widely used, battery-powered robots require greater power efficiency. However, as AI models grow in parameter count, conventional LPDDR alone is becoming insufficient to provide the required memory bandwidth.

Micron expects HBM to eventually be adopted in humanoid robots. “Current AI models for robots use around 1 billion to 2 billion parameters, so their memory bandwidth requirements are not particularly high,” Lee said. “But as more advanced vision-language models (VLMs) emerge, LPDDR alone will become insufficient, requiring a transition to HBM.”

Memory capacity is also becoming increasingly important. Micron expects future high-performance humanoid robots to require approximately 200GB of DRAM and 4TB of storage, compared with 12GB of DRAM and 256GB of storage used in current service robots.

“Conventional DRAM and storage will struggle to meet the demands of the physical AI market,” Lee said. “We are collaborating with robot manufacturers, chipset companies and hyperscalers from the early design stages.”